A new synthesis approach for non-uniform filters in the log-scale: proof of concept

International audienceWe theoretically describe and give the proof of a new way to synthesize filters that are affine in the log–log scale in the frequency domain and are especially appropriate to filter non-uniformly sampled data, and take advantage of a very low number of signal samples and filter coefficients. This approach leads to a summation formula which plays the same role as the discrete convolution for the usual finite impulse response filters

Self-timed rings as low-phase noise programmable oscillators

International audienceSelf-timed rings are promising for designing highspeed serial links and system clock generators. Indeed, their architecture is well-suited to digitally control their frequency and to easily adapt their phase noise by design. Self-timed ring oscillation frequency does not only depend on the number of stages as the usual inverter ring oscillators but also on their initial state. This feature is extremely important to make them programmable. Moreover, with such ring oscillators, it is easy to control the phase noise by design. Indeed, 3dB phase noise reduction is obtained at the cost of higher power consumption when the number of stages is doubled while keeping the same oscillation frequency, thanks to the oscillator programmability. In this paper, we completely describe the method to design selftimed rings in order to make them programmable and to generate a phase noise in accordance with the specifications. Test chips have been designed and fabricated in AMS 0.35 μm and in STMicroelectonics CMOS 65 nm technology to verify our models and theoretical claims

Comparison of Self-Timed Ring and Inverter Ring Oscillators as Entropy Sources in FPGAs

International audienceMany True Random Numbers Generators (TRNG) use jittery clocks generated in ring oscillators as a source of entropy. This is especially the case in Field Programmable Gate Arrays (FPGA), where sources of randomness are very limited. Inverter Ring Oscillators (IRO) are relatively well characterized as entropy sources. However, it is known that they are very sensitive to working conditions. This fact makes them vulnerable to attacks. On the other hand, Self-Timed Rings (STR) are currently considered as a promising solution to generate robust clock signals. Although many studies deal with their temporal behavior and robustness in Application Specific Integrated Circuits (ASIC), equivalent study does not exist for FPGAs. Furthermore, these oscillators were not analyzed and characterized as entropy sources aimed at TRNG design. In this paper, we analyze STRs as entropy sources for TRNGs implemented in FPGAs. Next, we compare STRs and IROs when serving as sources of randomness. We show that STRs represent very interesting alternative to IROs: they are more robust to environmental fluctuations and they exhibit lower extra-device frequency variations

A Self-timed Ring Based True Random Number Generator

International audienceSelf-timed rings are oscillators in which several events can evolve evenly-spaced in time thanks to analog effects inherent to the ring stage structure. One of their interesting features is that they provide precise high-speed multiphase signals. This paper presents a true random number generator that exploits the jitter of events propagating in a self-timed ring with a high entropy. Designs implemented in Altera Cyclone III and Xilinx Virtex 5 devices provide high quality random bit sequences passing FIPS 140-1 and NIST SP 800-22 statistical tests at a high bit rate

A Very High Speed True Random Number Generator with Entropy Assessment

International audienceThe proposed true random number generator (TRNG) exploits the jitter of events propagating in a self-timed ring (STR) to generate random bit sequences at a very high bit rate. It takes advantage of a special feature of STRs that allows the time elapsed between successive events to be set as short as needed, even in the order of picoseconds. If the time interval between the events is set in concordance with the clock jitter magnitude, a simple entropy extraction scheme can be applied to generate random numbers. The proposed STR-based TRNG (STRNG) follows AIS31 recommendations: by using the proposed stochastic model, designers can compute a lower entropy bound as a function of the STR characteristics (number of stages, oscillation period and jitter magnitude). Using the resulting entropy assessment, they can then set the compression rate in the arithmetic post-processing block to reach the required security level determined by the entropy per output bit. Implementation of the generator in two FPGA families confirmed its feasibility in digital technologies and also confirmed it can provide high quality random bit sequences that pass the statistical tests required by AIS31 at rates as high as 200 Mbit/s

A dynamical approach to generate chaos in a micromechanical resonator

Chaotic systems, presenting complex and non-reproducible dynamics, may be found in nature from the interaction between planets to the evolution of the weather, but can also be tailored using current technologies for advanced signal processing. However, the realization of chaotic signal generators remains challenging, due to the involved dynamics of the underlying physics. In this paper, we experimentally and numerically present a disruptive approach to generate a chaotic signal from a micromechanical resonator. This technique overcomes the long-established complexity of controlling the buckling in micro/nano-mechanical structures by modulating either the amplitude or the frequency of the driving force applied to the resonator in the nonlinear regime. The experimental characteristic parameters of the chaotic regime, namely the Poincar\'e sections and Lyapunov exponents, are directly comparable to simulations for different configurations. These results confirm that this dynamical approach is transposable to any kind of micro/nano-mechanical resonators, from accelerometers to microphones. We demonstrate a direct application exploiting the mixing properties of the chaotic regime by transforming an off-the-shelf microdiaphragm into a true random number generator conformed to the National Institute of Standards and Technology specifications. The versatility of this original method opens new paths to combine chaos' unique properties with microstructures' exceptional sensitivity leading to emergent microsystems

Self-Timed Rings: A Promising Solution for Generating High-Speed High Resolution Low-Phase Noise Clocks

International audienceA high-speed multi-phase oscillator based on self-timed ring is proposed. Self-timed rings (STR) are promising approach for designing high-speed serial links and clock generators. Indeed, the architecture of STR allows us to achieve high frequencies with multiphase outputs and their oscillation frequency is not only depending on the number of stages but also on the initial state of the ring. Moreover, this architecture allows us 3 dB phase noise reduction when, while keeping the same frequency, when the stage number is doubled. In this chapter, we propose a method to design STR able to generate high-speed multi-phase outputs and we suggest a design flow for designing low-phase noise self-timed ring oscillators. A test chip has been designed and fabricated in STMicroelectonics CMOS65nm technology to verify the theoretical claims and validate the simulation results

Innovation for Education on Internet of Things

The Internet of Things (IoT) and related objects are becoming more prevalent around the world with exponential growth for the next fifteen years. This evolution implies innovation in many fields of technology, whose core is in microelectronics. Indeed, IoT deals with all societal applications such as health, the environment, transport, energy and communications. Thus, connected objects involve many technological components: sensors and actuators, signal processing circuits, data transmission circuits and systems, energy recovery systems, which directly depend on the performance of microelectronics. To create new connected objects, innovation is the main driver. Innovation results from the combination of a multidisciplinary approach, links between disciplines and the necessary know-how of engineers and technicians. This paper deals with the orientation of pedagogy towards these objectives through the development of dedicated and innovative platforms in microelectronics. These platforms are developed by the French National Microelectronics Education Network (CNFM). After presenting the context of IoT and the evolution of microelectronics technologies, this article highlights the main components of connected objects applied to many societal applications. Each component of the objects requires specific microelectronic devices or circuits. Innovation appears in the nature of platforms, the multidisciplinary approach of training, the permanent links between disciplines, and the adaptation to new educational tools, mainly online. The results of the training on innovative platforms are presented and discussed